Commits
Bill Huang committed fde207eb151
clk: tegra: pll: Add code to handle if resets are supported by PLL If a PLL has a reset_reg specified, properly handle that in the enable/disable logic paths. Reviewed-by: Benson Leung <bleung@chromium.org> Signed-off-by: Bill Huang <bilhuang@nvidia.com> Signed-off-by: Rhyland Klein <rklein@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>