Commits
Merge tag 'sunxi-clk-for-4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-next Pull Allwinner clock driver updates from Maxime Ripard: - Addition of sigma/delta modulation for the audio PLLs on the newer SoCs - A83t Display clocks supports - minor fixes that didn't have any impact on current features * tag 'sunxi-clk-for-4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: clk: sunxi-ng: sun4i: Export video PLLs clk: sunxi-ng: Add A83T display clocks clk: sunxi-ng: sun8i: a23: Use sigma-delta modulation for audio PLL clk: sunxi-ng: sun6i: Use sigma-delta modulation for audio PLL clk: sunxi-ng: sun5i: Use sigma-delta modulation for audio PLL clk: sunxi-ng: sun4i: Use sigma-delta modulation for audio PLL clk: sunxi-ng: sun8i: h3: Use sigma-delta modulation for audio PLL clk: sunxi-ng: nm: Add support for sigma-delta modulation clk: sunxi-ng: Add sigma-delta modulation support clk: sunxi-ng: nm: Check if requested rate is supported by fractional clock clk: sunxi-ng: sun5i: Fix bit offset of audio PLL post-divider clk: sunxi-ng: a83t: Fix invalid csi-mclk mux offset clk: sunxi-ng: sun6i: Rename HDMI DDC clock to avoid name collision clk: sunxi-ng: sun6i: Export video PLLs clk: sunxi-ng: Implement reset control status readback clk: sunxi-ng: Fix missing CLK_SET_RATE_PARENT in ccu-sun4i-a10.c clk: sunxi-ng: add CLK_SET_RATE_PARENT flag to H3 GPU clock clk: sunxi-ng: add CLK_SET_RATE_UNGATE to all H3 PLLs
