Commits
Chandrabhanu Mahapatra committed 05dd0f53082
OMAPDSS: DISPC: Update Accumulator configuration for chroma plane DISPC has two accumulator registers DISPC_VIDp_ACCU_0 and DISPC_VIDp_ACCU_1 each with horizontal and vertical bit fields. The bit fields can take values in the range of -1024 to 1023. Based on bit field values DISPC decides on which one out of 8 phases the filtering starts. DISPC_VIDp_ACCU_0 is used for progressive output and for interlaced output both DISPC_VIDp_ACCU_0 and DISPC_VIDp_ACCU_1 are used. The current accumulator values in DISPC scaling logic for chroma plane takes default values for all color modes and rotation types. So, the horizontal and vertical up and downsampling accumulator bit field values have been updated for better performance. Signed-off-by: Chandrabhanu Mahapatra <cmahapatra@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>