Commits
Qipan Li committed bf83fd6402a
spi: sirf: fix spi full-duplex DMA transferring issue sometimes t->tx can be equal with t->rx. for example, spidev will make tx and rx point to spidev->buffer at the same time. currently, for this case, we map the buffer BIDIRECTION to fix the cache consistency. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Mark Brown <broonie@linaro.org>