Commits
Russell Joyce committed e4a8f8ee89e
PCI: xilinx: Check for MSI interrupt flag before handling as INTx Occasionally both MSI and INTx bits in the interrupt decode register are set at once by the Xilinx AXI PCIe Bridge, so the MSI flag in the interrupt message should be checked to ensure that the correct handler is used. If this check is not in place and the interrupt message type is MSI, the INTx handler will be used erroneously when both type bits are set. This will also be followed by a second read of the message FIFO, which can result in the function returning early and the interrupt decode register not being cleared if the FIFO is now empty. Signed-off-by: Russell Joyce <russell.joyce@york.ac.uk> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>