Commits
Masahiro Yamada committed 0bd20207ab2
ARM: uniphier: disable cache in SPL of PH1-LD20 The Boot ROM has enabled D-cache and MMU setting DDR memory area as Normal Memory in its page table. Disable D-cache and MMU before jumping to U-Boot proper. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>