Commits
Marek Vasut committed 70ed80af46e
ddr: altera: Zero DM IN delay in scc_mgr_zero_group() This one last set of delay configuration registers was not properly zeroed out originally, fix it and zero them out. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>