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![Stefan Roese](https://secure.gravatar.com/avatar/5c17498da946816cba856571423a5ef0.jpg?s=96&d=mm)
Stefan Roese committed a5f50e0114f
mips: mt76xx: Flush d-cache in arch_misc_init() to solve d-cache issues It has been noticed, that sometimes the d-cache is not in a "clean-state" when U-Boot is running on MT7688. This was detected when using the ethernet driver (which uses d-cache) and a TFTP command does not complete. Flushing the complete d-cache (again?) here seems to fix this issue. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>