linux-phytec-fsl

[media] s5p-jpeg: Document sclk-jpeg clock for Exynos3250 SoC

JPEG IP on Exynos3250 SoC requires enabling two clock gates
for its operation. This patch documents this requirement.

Signed-off-by: Jacek Anaszewski <j.anaszewski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>