Commits
Shengjiu Wang committed 22a207f8be6
MLK-13418: ASoC: wm8960: workaround no sound issue in master mode The input MCLK is 12.288MHz, The desired output sysclk is 11.2896MHz the sample rate is 44100Hz, with the pllprescale=2, postscale=sysclkdiv=1, some chip may have wrong bclk and lrclk output in master mode. then there will be no sound. With the pllprescale=1, postscale=2, the output clock is correct. so use this configuration to workaround this issue. Tested 8k/11k/16k/22k/32k/44k/48kHz case. Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>