Commits
Alexander Shiyan committed 2a6f0614153
ARM: clps711x: Set PLL clock to zero if we work from 13 mHz source This clock will be used in audio subsystem. Since audio cannot work without PLL we should indicate this. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Olof Johansson <olof@lixom.net>