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![Chen-Yu Tsai](https://secure.gravatar.com/avatar/53e17915a0ebda94220596c4137b83fa.jpg?s=96&d=mm)
Chen-Yu Tsai committed 2b9c875c56f
clk: sunxi-ng: mux: Add support for mux tables Some clock muxes have holes, i.e. invalid or unconnected inputs, between parent mux values. Add support for specifying a mux table to map clock parents to mux values. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>