Commits
Shengjiu Wang committed 40eb8c96b38
MLK-12794: ASoC: fsl_asrc: fix underrun issue when convert 192k to 96kHz. The maximum divider of asrc clock is 1024, but there is no judgement for this limitaion in driver, which may cause the divider setting not correct. When IDEAL_RATIO_RATE 200kHZ, the cost time of conversion from 192kHz to 96kHz is 24ms every 1024 sample, but these sample's playback time is 1024/96=11ms, so there will be underrun. So need to enlarge this RATE. Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>