linux-phytec-fsl

MLK-14795 PCI: designware: fail to read the ep mem on rc board

The mem_base address is configured as the outbound
memory region twice when imx pcie ep/rc validation
is enabled.
Mask the one contained in desigware driver to fix
this issue.
Remove the usleep_range usage in designware driver,
since that function maybe used in imx noirq pm
calls.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>