Commits
Zi Shen Lim committed 5fdc639a7a5
arm64: introduce aarch64_insn_gen_add_sub_shifted_reg() Introduce function to generate add/subtract (shifted register) instructions. Signed-off-by: Zi Shen Lim <zlim.lnx@gmail.com> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>