Commits
Shengjiu Wang committed 66f23c08f6a
MLK-11053: ASoC: imx_mqs: Remove 96k and 192k support for mqs If the mclk is 24.576MHz, mqs can't support 96k and 192kHz, because the we can't get a proper clock divider for mqs. Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>