Commits
Bai Ping committed 70bf240451c
MLK-13309-01 ARM: imx: clear the L2_PGE bit on imx6sll On i.MX6SLL, the 'L2_PGE' bit in GPC CNTR register is set by default,this bit must be clear, otherwise, system will failed to resume from DSM mode if L2 cache is enabled. Signed-off-by: Bai Ping <ping.bai@nxp.com>