Commits
![Andre Przywara](https://secure.gravatar.com/avatar/3e4f28ff580d6746a4daff30b6997906.jpg?s=96&d=mm)
Andre Przywara committed 72360b91164
clk: sunxi: improve mux_clk error handling and reporting We now catch and report a failing ioremap, also a failure in the final step of the clock registration is now handled and reported. Also warnings are turned into errors. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>