Commits
Petri Gynther committed adaa0b6c497
MIPS: Switch BMIPS5000 to use r4k_wait_irqoff() BCM7425 CPU Interface Zephyr Processor, pages 5-309 and 5-310 BCM7428B0 CPU Interface Zephyr Processor, pages 5-337 and 5-338 WAIT instruction: Thread enters wait state. No instructions are executed until an interrupt occurs. The processor's clocks are stopped if both threads are in idle mode. Description: Execution of this instruction puts the thread into wait state, an idle mode in which no instructions are fetched or executed. The thread remains in wait state until an interrupt occurs that is not masked by the interrupt mask field in the Status register. Then, if interrupts are enabled by the IE bit in the Status register, the interrupt is serviced. The ERET instruction returns to the instruction following the WAIT instruction. If interrupts are disabled, the processor resumes executing instructions with the next sequential instruction. Programming notes: The WAIT instruction should be executed while interrupts are disabled by the IE bit in the Status register. This avoids a potential timing hazard, which occurs if an interrupt is taken between testing the counter and executing the WAIT instruction. In this hazard case, the interrupt will have been completed before the WAIT instruction is executed, so the processor will remain indefinitely in wait state until the next interrupt. Signed-off-by: Petri Gynther <pgynther@google.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Cc: cernekee@gmail.com Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11322/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>