Commits
Laxman Dewangan committed d57f5dedde1
i2c: tegra: add support for fast plus (FM+) mode clock rate Tegra I2C controller required to configure the clock divisor register inside controller to different value based on the clock speed. The recommended clock divisor for the I2C controller for standard/fast mode is 0x19 and for fast-mode plus is 0x10. Add support to configure clock divisor register of I2C controller based on bus clock rate. This clock divisor is supported form T114 onwards. Signed-off-by: Chaitanya Bandi <bandik@nvidia.com> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>