linux-phytec-fsl

MLK-13362-2 ARM: imx: fix audio bus mode hang for imx6dq lpddr2

The double MU count operations should be only done when changing the
MMDC frequency from 400MHz to a low frequency(100MHz or 24MHz).
Otherwise, the MU count may overflow and lead to system hang/panic issue.

This is basically a porting of 4d09bf110b878a6f720ee9d19c8b64ceace95fbe
to imx6dq lppdr2.

Also a member "freq" has been added to the mmdc_settings_info structure
to store the current ddr frequency on iram settings to be able to execute
the double MU count, only on 400MHz mode and bypass the operation
otherwise within the update freq routine.

Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>