linux-phytec-fsl

Merge tag 'zynq-clk-for-3.11' of git://git.xilinx.com/linux-xlnx into next/soc

From Michal Simek:
arm: Xilinx Zynq clock changes for v3.11

Change Xilinx Zynq DT clock description which reflects logical abstraction
of Zynq's clock tree.

- Refactor PLL driver
- Use new clock controller driver
- Change timer and uart drivers

* tag 'zynq-clk-for-3.11' of git://git.xilinx.com/linux-xlnx:
  clk: zynq: Remove deprecated clock code
  arm: zynq: Migrate platform to clock controller
  clk: zynq: Add clock controller driver
  clk: zynq: Factor out PLL driver

Signed-off-by: Olof Johansson <olof@lixom.net>