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![Zumeng Chen](https://secure.gravatar.com/avatar/3d70e14a19cdefedc04cbd82680a882c.jpg?s=96&d=mm)
Zumeng Chen committed ffac0e967f2
net: macb: ensure ordering write to re-enable RX smoothly When a hardware issue happened as described by inline comments, the register write pattern looks like the following: <write ~MACB_BIT(RE)> + wmb(); <write MACB_BIT(RE)> There might be a memory barrier between these two write operations, so add wmb to ensure an flip from 0 to 1 for NCR. Signed-off-by: Zumeng Chen <zumeng.chen@windriver.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: David S. Miller <davem@davemloft.net>