Commits
Suman Anna committed 0c730f9ec17
ARM: dts: dra7: Add PRU-ICSS nodes Add the DT nodes for the PRU-ICSS1 and PRU-ICSS2 processor subsystems that are present on AM57xx family of SoCs. Each PRU-ICSS instance is represented by a pruss node and other child nodes. The two PRU-ICSSs are identical to each other. They are not supported on DRA7xx SoCs in general, so the nodes are added under a disabled interconnect target module node in a common dra7-pruss.dtsi file. They should be enabled only in the AM57xx related board files. The PRU-ICSSs on AM57xx are very similar to the PRUSS in AM33xx and AM437x except for variations in the RAM sizes and the number of interrupts coming into the MPU INTC. The interrupt events into the PRU-ICSS also requires programming of the corresponding crossbars properly. The PRUSS subsystem node contains the entire address space. The various sub-modules of the PRU-ICSS are represented as individual child nodes (so platform devices themselves) of the PRUSS subsystem node. These include the two PRU cores and the interrupt controller. The Industrial Ethernet Peripheral (IEP), the Real Time Media Independent Interface controller (MII_RT), and the CFG sub-module are represented as syscon nodes. All the Data RAMs are represented within a child node of its own named 'memories' without any compatible. The DT nodes use all standard properties. The regs property in the PRU nodes define the addresses for the Instruction RAM, the Debug and Control sub-modules for that PRU core. The firmware for each PRU core is defined through a 'firmware-name' property. The default names for the firmware images for each PRU core are defined as follows (these can be adjusted either in derivative board dts files or through sysfs at runtime if required): PRU-ICSS1 PRU0 Core: am57xx-pru1_0-fw PRU-ICSS1 PRU1 Core: am57xx-pru1_1-fw PRU-ICSS2 PRU0 Core: am57xx-pru2_0-fw PRU-ICSS2 PRU1 Core: am57xx-pru2_1-fw Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com>