Commits
Thierry Reding committed 1ec7032ad51
clk: tegra: Add fixed factor peripheral clock type Some of the peripheral clocks on Tegra are derived from one of the top- level PLLs with a fixed factor. Support these clocks by implementing the ->enable() and ->disable() callbacks using the peripheral clock register banks and the ->recalc_rate() by dividing the parent rate by the fixed factor. Signed-off-by: Thierry Reding <treding@nvidia.com>