Commits
Thierry Reding committed 25bb2cec884
drm/tegra: sor: Factor out tegra_sor_set_parent_clock() Switching the SOR parent clock can glitch if done while the clock is enabled. Extract a common function that can be used to disable the module clock, switch the parent and reenable the module clock. Signed-off-by: Thierry Reding <treding@nvidia.com>