Commits
Sonic Zhang committed 4a65163e3b2
i2c-bfin-twi: abort transfer is MEM bit is reset unexpectedly Sometimes, the first I2C transmit interrupt is not serviced in time (like when higher priority interrupts take too long). Since the RESTART bit is not set before the next I2C clock, when the TWI handler is finally called, the I2C session is aborted (MEM bit is reset) and both SMITSERV and MCOMP int status bits are set. So when this happens, abort the transfer. Reported-by: Isabelle Leonardi <i.leonardi@detracom.fr> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Ben Dooks <ben-linux@fluff.org>