Commits
Kishon Vijay Abraham I committed 7560f56d7f1
phy: cadence: Sierra: Set cmn_refclk/cmn_refclk1 frequency to 25MHz Set cmn_refclk/cmn_refclk1 frequency to 25MHz as specified in "Common Module Clock Configurations" of the Cadence Sierra 16FFC Multi-Protocol PHYPMA Specification. It is set to 25MHz since the only user of Cadence Sierra SERDES, TI J721E SoC provides input clock frequency of 100MHz. For other frequencies, cmn_refclk/cmn_refclk1 should be configured based on the "Common Module Clock Configurations". Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>