linux-phytec-ti

gpio: davinci: irq support for multiple gpio controllers

The Davinci GPIO driver is implemented to work with one monolithic
Davinci GPIO platform device which may have up to Y(144) gpios.
The Davinci GPIO driver instantiates number of GPIO chips with
max 32 gpio pins per each during initialization and one IRQ domain.
So, the current GPIO's  opjects structure is:

<platform device> Davinci GPIO controller
 |- <gpio0_chip0> ------|
 ...                    |--- irq_domain (hwirq [0..143])
 |- <gpio0_chipN> ------|

The gpio2hwirq conversation is performing in the following way:
 hwirq = gpio0_chipX.base + gpio_offsetN

 where gpio_offsetN is gpio pin number inside gpio0_chipX
 and gpio0_chipX.base can have values 0..128 with step 32.

Above will work properly only when one Davinci GPIO controller is
present, but if second one (68 gpios) is added IRQs will not work for it,
because gpio1_chipX.base will have values 144..208 with step 32 and
above formula will not work any more.

Hence, update Davinci GPIO driver to handle this situation properly:
- add new field in struct davinci_gpio_controller.ctrl_base and
  save Linux GPIO number of the first GPIO assigned to the Davinci GPIO
  controller in .probe() - value of static variable "bank_base";
- correct gpio2hwirq conversation formula as below
  hwirq = (gpio0_chipX.base - gpio_controller.ctrl_base) + gpio_offsetN

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
[j-keerthy@ti.com added the ctrl_base to keep track of gpios per controller]
Signed-off-by: Keerthy <j-keerthy@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>