linux-phytec-ti

mfd: sec-core: Disable buck voltage reset on watchdog falling edge

The WRSTBI bit (disabled by default but enabled by bootloader), when
set, is responsible for resetting voltages to default values of
certain bucks on falling edge of Warm Reset Input pin from AP.

However on some boards (with S2MPS13) the pin is pulled down so any
suspend will effectively trigger the reset of bucks supplying the power
to the little and big cores. In the same time when resuming, these bucks
must provide voltage greater or equal to voltage before suspend to match
the frequency chosen by cpufreq. If voltage (default value of voltage
after reset) is lower than one set by cpufreq before suspend, then
system will hang during resuming.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reported-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Tested-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>