linux-phytec-ti

ARM: dts: dra72-evm-common: Add timers to IPUs and DSP

Add the required system timers to all the remote processor
device nodes (IPU1, IPU2 and DSP1) for all the DRA72 EVM
boards. The data is added to the dra72-evm-common dts file
since it is common to all DRA72 EVM board variations. This
data is identical to that of the equivalent processors on
the DRA7 EVM board to maintain firmware compatibility
between both the SoC and board variants.

The timers are optional, but are mandatory to support device
management features such as power management and watchdog support.
The above are added to successfully boot and execute firmware images
configured with the respective timers, images that use internal
processor subsystem timers are not affected. The timers can be
changed or removed as per the system integration needs, if needed,
after making the appropriate changes on the firmware side.

Each of the IPUs has two Cortex-M4 processors, and is currently
expected to be running in SMP-mode, so only a single timer suffices
to provide the BIOS tick timer. An additional timer should be added
for the second processor in IPU if it were to be run in non-SMP mode.
The timer value also needs to be unique from the ones used by other
processors so that they can be run simultaneously.

Signed-off-by: Suman Anna <s-anna@ti.com>