Commits
Nishanth Menon committed b289e7dcecd
HACK: ti_config_fragments/k2g_only.cfg: Re-enable SMP to workaround coherence issues A15 is a SMP capable SoC and K2G uses an SMP capable SoC in a uni-processor configuration. As a result of this, we had originally expected to disable CONFIG_SMP and manage to get a slight boost performance wise. However, as the program progressed, the following surprising behavior was observed. Disabling CONFIG_SMP causes the Kernel's default cache allocation strategy to change from is switched from "write-allocate" to "write-back". This causes hardware blocks such as USB, PCIe write operations to become non-coherent from A15's perspective. However, all of the following are treated identically in A15: Write-back, Read-Write Allocate Write-back, Read Allocate Write-back, Write Allocate Write-back, No Allocate > This is a somewhat specialized type which we doubt comes into play here. All of the following write-thru options are treated as non-cacheable in A15: Write-thru, Read-Write Allocate Write-thru, Read Allocate Write-thru, Write Allocate Write-thru, No Allocate Based on the TLB captures taken with and without CONFIG_SMP, it was evaluated that that the properties used should NOT have a coherence issue. Since the issue is still under debug, we must choose to enable CONFIG_SMP for KS2 generation devices as a temporary work around. Final decision if a proper workaround is provided OR if coherence needs to be disabled overall for KS2* devices is yet to be finalized. Reported-by: Roger Quadros <rogerq@ti.com> Reported-by: Bin Liu <b-liu@ti.com> Reported-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com>