linux-phytec-ti

SLINTIDEV-3 arm: dts: phytec: update memory config, and model and compatible strings

Memory configuration for PCM-057 updated with correct format:
<top 32 addr, bottom 32 addr, top 32 size, bottom 32 size>

For 4GiB DDR boards, only 2GiB is specified in these files as
the top 2GiB is not directly addressable. Configuration for
the top 2GiB of 4GiB DDR SOMs is handled in U-Boot.

Signed-off-by: Matt McKee <mmckee@phytec.com>