Commits
Chen-Yu Tsai committed b712a623bd5
clk: sunxi: Register divs clocks before factor clocks We want to reparent AHB clock to PLL6 on sun5i/sun7i using the assigned clocks properties. AHB is a factor clock, while PLL6 is a divs clock. Register divs clocks before factor clocks so reparenting works. This is only needed because we do the reparenting on the clock provider. The proper way to fix this is to split out all the old sunxi clocks into separate CLK_OF_DECLARE statements, like we are doing for sun9i. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>