linux-phytec-ti

clk: keystone: sci-clk: increase the max gap size to 50 for clk ids

AM65x appears to have almost 50 clock id gaps in the definitions, so
increase the max gap size to this. Otherwise the probe will bail out
prematurely, not registering the remaining clocks at all.

Signed-off-by: Tero Kristo <t-kristo@ti.com>