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![Jerome Brunet](https://secure.gravatar.com/avatar/71316ce9f400d3fd48abc4610d61c68c.jpg?s=96&d=mm)
Jerome Brunet committed dc4e62d373f
clk: meson: axg: spread spectrum is on mpll2 After testing, it appears that the SSEN bit controls the spread spectrum function on MPLL2, not MPLL0. Fixes: 78b4af312f91 ("clk: meson-axg: add clock controller drivers") Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>