Commits
Dongsheng Wang committed e00c9a0c2ef
powerpc/mpc85xx: invalidate TLB after hibernation resume This problem belongs to the core synchronization issues. The cpu1 already updated spin_table values, but bootcore cannot get this value in time. After bootcpu hibiernation restore the pages. we are now running with the kernel data of the old kernel fully restored. if we reset the non-bootcpus that will be reset cache(tlb), the non-bootcpus will get new address(map virtual and physical address spaces). but bootcpu tlb cache still use boot kernel data, so we need to invalidate the bootcpu tlb cache make it to get new main memory data. log: Enabling non-boot CPUs ... smp_85xx_kick_cpu: timeout waiting for core 1 to reset smp: failed starting cpu 1 (rc -2) Error taking CPU1 up: -2 Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Reviewed-by: Anton Vorontsov <anton@enomsg.org> [scottwood@freescale.com: reworded code comment for clarity] Signed-off-by: Scott Wood <scottwood@freescale.com>