Commits
Chen-Yu Tsai committed f1017969661
clk: sunxi: Add pll6 / 4 clock output to sun4i-a10-pll6 The pll6 has a /4 output that is used as an input to the ahb mux clock. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>