linux-phytec-ti

remoteproc/omap: add support for DRA7xx remote processors

DRA7xx SoCs have two IPU and up to two DSP processor subsystems
for offloading different computation algorithms. The IPU processor
subsystem contains dual-core ARM Cortex-M4 processors, and is
very similar to those on OMAP5. The DSP processor subsystem is
based on the TI's standard TMS320C66x DSP CorePac core.

Support has been added to the OMAP remoteproc driver through new
DRA7xx specific compatibles for properly probing and booting the
all the different processor subsystem instances on DRA7 - IPU1,
IPU2, DSP1 & DSP2. A build dependency with SOC_DRA7XX is added to
enable the driver to be built in DRA7xx-only configuration.

The DSP boot address programming needed enhancement for DRA7xx as
the boot register fields are different on DRA7 compared to OMAP4
and OMAP5 SoCs. The register on DRA7xx contains additional fields
within the register and the boot address bit-field is right-shifted
by 10 bits. The internal memory parsing logic has also been updated
to compute the device addresses for the L2 RAM for DSP devices using
relative addressing logic. Note that the current logic doesn't
handle the parsing of L1P or L1D memories on DRA7 DSPs intentionally,
but it can be easily added if needed in the future. These are mostly
expected to be used as Caches instead of RAMs.

The firmware lookup logic also has to be adjusted for DRA7xx as
there are (can be) more than one instance of both the IPU and DSP
remote processors for the first time in OMAP4+ SoCs.

The names for the firmware images are fixed for each processor and
is expected to be as follows:
	IPU1: dra7-ipu1-fw.xem4
	IPU2: dra7-ipu2-fw.xem4
	DSP1: dra7-dsp1-fw.xe66
	DSP2: dra7-dsp2-fw.xe66

Signed-off-by: Suman Anna <s-anna@ti.com>