Commits
Steffen Trumtrar committed f8fdf5375e2
ASoC: fsl-ssi: add SSIEN errata work around The chip errata for the i.MX35, Rev.2 has the following errata: ENGcm06222: SSI:Transmission does not take place in bit length early frame sync configuration The workaround states, that TX_EN and SSI_EN bits should be set in the same register write. As the next errata in the document (ENGcm06532) says to always write RX_EN and TX_EN in the same register write in network mode. Therefore include the whole write to CCSR_SSI_SCR_TE and CCSR_SSI_SCR_RE into the write to CCSR_SSI_SCR_SSIEN Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Mark Brown <broonie@linaro.org>