Commits
![Roger Quadros](https://secure.gravatar.com/avatar/0ab10ca4a01e251a2321c3c4b1dc0018.jpg?s=96&d=mm)
Roger Quadros committed f95dbe82e29
net: ethernet: ti: icssg_prueth: add periodic output support Firmware can't deal with period of less than cycle time (1 ms). Firmware takes care of setting the SYNC_EN pulse every cycle. If the period is greater than firmware cycle time (1ms) then we need to set number of cycles in TIMESYNC_FW_WC_SYNCOUT_REDUCTION_FACTOR_OFFSET and remaining time in CMP register. Signed-off-by: Roger Quadros <rogerq@ti.com>