Commits
Author | Commit | Message | Commit date | Issues | |
---|---|---|---|---|---|
Matt McKee | 259a26efa00 | arm64: dts: phytec: enable USB3.0 support on USB0Signed-off-by: Matt McKee <mmckee@phytec.com> | |||
Matt McKee | 559d0cf856b | arm64: dts: phytec: add reg to ft5x06 nodeSigned-off-by: Matt McKee <mmckee@phytec.com> | |||
Matt McKee | 3439e6370de | arm64: dts: phytec: update Makefile for v5.4Signed-off-by: Matt McKee <mmckee@phytec.com> | |||
Matt McKee | 19a4db2aa0b | SLINTIDEV-47 arm64: dts: phytec: support A3 revision of phyCORE-AM65x kit carrier boardLCD backlight moved to eHRPWM3 and I2C bus used for display touchscreen moved to WKUP_I2C0. Signed-off-by: Matt McKee <mmckee@phytec.com> | SLINTIDEV-47 | ||
Matt McKee | 9c31f2ffacb | SLINTIDEV-23 arm64: dts: k3-am65xx-phycore-som: enable RV-3028 RTC supportSigned-off-by: Matt McKee <mmckee@phytec.com> | 2 Jira Issues | ||
Matt McKee | 0e4b916a808 | SLINTIDEV-23 arm64: configs: am65xx_phycore_kit_defconfig: enable RV-3028 RTC supportSigned-off-by: Matt McKee <mmckee@phytec.com> | 2 Jira Issues | ||
Matt McKee | 2f83268a4d3 | SLINTIDEV-32 rtc: rv3028: read 32-bit value for backup-switchover-mode propertyAdditionally, include rtc-core.h to eliminate a compilation error. Signed-off-by: Matt McKee <mmckee@phytec.com> | SLINTIDEV-32 | ||
Phil Howard | ac142412a97 | rtc: rv3028: Add backup switchover mode supportSigned-off-by: Phil Howard <phil@pimoroni.com> Signed-off-by: Matt McKee <mmckee@phytec.com> | |||
Anna Horstmann | 2b5842677c1 | AM65SW-145 arm64: dts: phytec: add sample overlay for expansion boardk3-am65xx-phytec-expansion-sample.dtso configures a selection of interfaces available at the expansion connector of the phyCORE-AM65x Carrier Board. Signed-off-by: Anna Horstmann <ahorstmann@phytec.com> | AM65SW-145 | ||
Matt McKee | e368cc534bc | AM65SW-88 arm64: configs: am65xx_phycore_kit_defconfig: enable spidev driver as moduleSigned-off-by: Matt McKee <mmckee@phytec.com> | AM65SW-88 | ||
Matt McKee | 040bbcb3afb | AM65SW-126 arm64: dts: phytec: k3-am65xx-pcm-941: configure reset GPIO for PCIe 1Signed-off-by: Matt McKee <mmckee@phytec.com> | AM65SW-126 | ||
Matt McKee | 340173d1219 | AM65SW-126 drivers: pci: controller: dwc: pci-keystone: get PCIe reset GPIO earlier in probeWhen this driver uses a GPIO as the PCIe reset signal and that GPIO isn't ready for use in the first driver probe, it will hang when linking the PCIe PHY on the next driver probe. To prevent this hang, we move the getting of the GPIO to before the driver links the PCIe PHYs to the device which allows the driver to cleanly exit with an EPROBE_DEFER return. Since the timing of the use of the GPIO... | AM65SW-126 | ||
Matt McKee | 6da22f241df | AM65SW-76 arm64: dts: phytec: k3-am65xx: add SDIO WiFi and UART BT supportInternal reference: AM65SW-77 Signed-off-by: Matt McKee <mmckee@phytec.com> | 2 Jira Issues | ||
Matt McKee | fa642c6a770 | AM65SW-77 arm64: configs: am65xx_phycore_kit_defconfig: configure BT supportConfigure Bluetooth support to target the Sterling-LWB WiFi/BT module on the phyCORE-AM65x SOM. Signed-off-by: Matt McKee <mmckee@phytec.com> | AM65SW-77 | ||
Matt McKee | 3b6e6f6ae32 | AM65SW-76 arm64: configs: am65xx_phycore_kit_defconfig: remove WiFi supportRemove WiFi support from the kernel so that we can build Sterling-LWB support out-of-tree with no conflicts. Internal reference: AM65SW-77 Signed-off-by: Matt McKee <mmckee@phytec.com> | 2 Jira Issues | ||
Matt McKee | 44ca58ac4b6 | AM65SW-83 arm64: dts: phytec: k3-am65xx-pcm-941: enable I2C1 supportSigned-off-by: Matt McKee <mmckee@phytec.com> | AM65SW-83 | ||
Matt McKee | 23fefe13865 | AM65SW-88 arm64: dts: phytec: k3-am65xx-pcm-941: enable SPI1 supportSigned-off-by: Matt McKee <mmckee@phytec.com> | AM65SW-88 | ||
Matt McKee | a5486b98e1d | AM65SW-56 arm64: dts: phytec: k3-am65xx-pcm-941: enable USB0 supportSigned-off-by: Matt McKee <mmckee@phytec.com> | AM65SW-56 | ||
Matt McKee | ffb387d6b38 | AM65SW-43 arm64: dts: phytec: k3-am65xx-pcm-941: enable OSPI0 NOR Flash supportSigned-off-by: Matt McKee <mmckee@phytec.com> | AM65SW-43 | ||
Matt McKee | 0ba45a06fb4 | AM65SW-62 arm64: dts: phytec: k3-am65xx-pcm-941: enable MCAN0 supportSigned-off-by: Matt McKee <mmckee@phytec.com> | AM65SW-62 | ||
Matt McKee | 879676ab7ce | AM65SW-55 arm64: dts: phytec: k3-am65xx-pcm-941: enable MCU_UART0 supportSigned-off-by: Matt McKee <mmckee@phytec.com> | AM65SW-55 | ||
Matt McKee | 60d298512a3 | AM65SW-54 arm64: dts: phytec: k3-am65xx-pcm-941: enable UART2 supportSigned-off-by: Matt McKee <mmckee@phytec.com> | AM65SW-54 | ||
Matt McKee | 75655026fad | AM65SW-78 arm64: dts: phytec: k3-am65xx: enable PHYTEC LCD-018 supportInternal reference: AM65SW-81 AM65SW-89 Signed-off-by: Matt McKee <mmckee@phytec.com> | 4 Jira Issues | ||
Matt McKee | 038e6b6c2e8 | AM65SW-78 drivers: gpu: drm: panel: panel-simple: add EDT ETM0700G0DH6 LCD panel LVDS configurationSigned-off-by: Matt McKee <mmckee@phytec.com> | AM65SW-78 | ||
Matt McKee | 9e12dbe35a2 | AM65SW-70 arm64: dts: phytec: k3-am65xx-pcm-941: enable GPIO fanSigned-off-by: Matt McKee <mmckee@phytec.com> | AM65SW-70 | ||
Matt McKee | d0f969b62bf | AM65SW-67 arm64: dts: phytec: k3-am65xx-phycore-som: enable SOM EEPROM supportSigned-off-by: Matt McKee <mmckee@phytec.com> | AM65SW-67 | ||
Matt McKee | 538f08e2410 | AM65SW-63 arm64: dts: phytec: k3-am65xx-pcm-941: enable PRU-ICSS-G1 RGMII1 and RGMII2 (ETH1 and ETH2)Internal reference: AM65SW-64 Signed-off-by: Matt McKee <mmckee@phytec.com> | 2 Jira Issues | ||
Matt McKee | 100f24ed6ad | AM65SW-65 arm64: dts: phytec: k3-am65xx-phycore-som: enable CPSW (ETH0)Signed-off-by: Matt McKee <mmckee@phytec.com> | AM65SW-65 | ||
Matt McKee | 8db4aeb9bf1 | AM65SW-104 drivers: net: phy: dp83867: add additional LED config optionsNew device tree properties added to support further LED configuration. The following properties have been added: ti,led-0-active-low: invert the polarity of LED_0 ti,led-2-active-low: invert the polarity of LED_2 If the one or both of the above properties are not present in the PHY node, the default of active high will be used for the respective LEDs. These changes were tested on the PHY... | AM65SW-104 | ||
Matt McKee | bdd66f793f1 | AM65SW-58 arm64: dts: phytec: k3-am65xx-pcm-941: enable USB1 supportSigned-off-by: Matt McKee <mmckee@phytec.com> | AM65SW-58 | ||
Matt McKee | 83138c68b62 | AM65SW-61 arm64: dts: phytec: k3-am65xx-pcm-941: enable PCIe x1 supportSigned-off-by: Matt McKee <mmckee@phytec.com> | AM65SW-61 | ||
Matt McKee | 32770ae18d1 | AM65SW-46 arm64: dts: phytec: k3-am65xx-phycore-som: enable MMC0 (eMMC) supportSigned-off-by: Matt McKee <mmckee@phytec.com> | AM65SW-46 | ||
Matt McKee | e4d91673a85 | AM65SW-52 arm64: dts: phytec: k3-am65xx-pcm-941: enable UART1 supportSigned-off-by: Matt McKee <mmckee@phytec.com> | AM65SW-52 | ||
Matt McKee | dbac1a9b87d | AM65SW-47 arm64: dts: phytec: k3-am65xx-pcm-941: enable MMC1 (MMC/SD) supportSigned-off-by: Matt McKee <mmckee@phytec.com> | AM65SW-47 | ||
Matt McKee | acfba3c17c4 | AM65SW-96 arm64: dts: phytec: k3-am65xx-phycore-som: configure memorySigned-off-by: Matt McKee <mmckee@phytec.com> | AM65SW-96 | ||
Matt McKee | 36caa137edd | AM65SW-84 arm64: dts: phytec: add base DTS files for PHYTEC phyCORE-AM65x KitSigned-off-by: Matt McKee <mmckee@phytec.com> | AM65SW-84 | ||
Matt McKee | d38c746ca7f | AM65SW-84 arm64: configs: add am65xx_phycore_kit_defconfig from TI tisdk_am65xx-evm_defconfig as baseSigned-off-by: Matt McKee <mmckee@phytec.com> | AM65SW-84 | ||
Anna Horstmann | 25ce62aa0f0 | AM65SW-103 arm64: configs: add TI's defconfig for am65xx-evmThe defconfig is the "savedefconfig" version of tisdk_am65xx-evm_defconfig, which was added by TI's SDK builder for release 07.01.00.006 Signed-off-by: Anna Horstmann <ahorstmann@phytec.com> | AM65SW-103 | ||
Dan Murphy | 9574bba32a1M | Merge tag 'v5.4.74' of http://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable into ti-linux-5.4.yThis is the 5.4.74 stable release * tag 'v5.4.74' of http://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable: (567 commits) Linux 5.4.74 phy: marvell: comphy: Convert internal SMCC firmware return codes to errno misc: rtsx: do not setting OC_POWER_DOWN reg in rtsx_pci_init_ocp() openrisc: Fix issue with get_user for 64-bit values crypto: x86/crc32c - fix building with clan... | |||
LCPD Auto Merger | 0c3d1b95506M | Merged TI feature connectivity into ti-linux-5.4.yTI-Feature: connectivity TI-Branch: connectivity-ti-linux-5.4.y * 'connectivity-ti-linux-5.4.y' of ssh://bitbucket.itg.ti.com/lcpdpublicdom/connectivity: Revert "net: ethernet: ti: cpts: move rx timestamp processing to ptp worker only" net: hsr: check for return value of skb_put_padto() Signed-off-by: LCPD Auto Merger <lcpd_integration@list.ti.com> | |||
Greg Kroah-Hartman | b300b28b781 | Linux 5.4.74Tested-by: Guenter Roeck <linux@roeck-us.net> Tested-by: Linux Kernel Functional Testing <lkft@linaro.org> Link: https://lore.kernel.org/r/CA+G9fYtw23F_PuCjiyVXz4464PsjcTSsL1jgvPP6D9xoZWZU7A@mail.gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> | |||
Pali Rohár | 847c86d7f1d | phy: marvell: comphy: Convert internal SMCC firmware return codes to errnocommit ea17a0f153af2cd890e4ce517130dcccaa428c13 upstream. Driver ->power_on and ->power_off callbacks leaks internal SMCC firmware return codes to phy caller. This patch converts SMCC error codes to standard linux errno codes. Include file linux/arm-smccc.h already provides defines for SMCC error codes, so use them instead of custom driver defines. Note that return value is signed 32bit, but s... | |||
Ricky Wu | aa3410cc232 | misc: rtsx: do not setting OC_POWER_DOWN reg in rtsx_pci_init_ocp()commit 551b6729578a8981c46af964c10bf7d5d9ddca83 upstream. this power saving action in rtsx_pci_init_ocp() cause INTEL-NUC6 platform missing card reader Signed-off-by: Ricky Wu <ricky_wu@realtek.com> Link: https://lore.kernel.org/r/20200824030006.30033-1-ricky_wu@realtek.com Cc: Chris Clayton <chris2553@googlemail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> | |||
Stafford Horne | a6db3aab9c4 | openrisc: Fix issue with get_user for 64-bit valuescommit d877322bc1adcab9850732275670409e8bcca4c4 upstream. A build failure was raised by kbuild with the following error. drivers/android/binder.c: Assembler messages: drivers/android/binder.c:3861: Error: unrecognized keyword/register name `l.lwz ?ap,4(r24)' drivers/android/binder.c:3866: Error: unrecognized keyword/register name `l.addi ?ap,r0,0' The issue is with 64-bit get_use... | |||
Arnd Bergmann | f73328c3192 | crypto: x86/crc32c - fix building with clang iascommit 44623b2818f4a442726639572f44fd9b6d0ef68c upstream. The clang integrated assembler complains about movzxw: arch/x86/crypto/crc32c-pcl-intel-asm_64.S:173:2: error: invalid instruction mnemonic 'movzxw' It seems that movzwq is the mnemonic that it expects instead, and this is what objdump prints when disassembling the file. Fixes: 6a8ce1ef3940 ("crypto: crc32c - Optimize CRC32C calculat... | |||
Souptick Joarder | 29bbc9cb0b2 | xen/gntdev.c: Mark pages as dirtycommit 779055842da5b2e508f3ccf9a8153cb1f704f566 upstream. There seems to be a bug in the original code when gntdev_get_page() is called with writeable=true then the page needs to be marked dirty before being put. To address this, a bool writeable is added in gnt_dev_copy_batch, set it in gntdev_grant_copy_seg() (and drop `writeable` argument to gntdev_get_page()) and then, based on batch->wri... | |||
Geert Uytterhoeven | 8f640cd8ee6 | ata: sata_rcar: Fix DMA boundary maskcommit df9c590986fdb6db9d5636d6cd93bc919c01b451 upstream. Before commit 9495b7e92f716ab2 ("driver core: platform: Initialize dma_parms for platform devices"), the R-Car SATA device didn't have DMA parameters. Hence the DMA boundary mask supplied by its driver was silently ignored, as __scsi_init_queue() doesn't check the return value of dma_set_seg_boundary(), and the default value of 0xfffff... | |||
Grygorii Strashko | 9f531583c1f | PM: runtime: Fix timer_expires data type on 32-bit archescommit 6b61d49a55796dbbc479eeb4465e59fd656c719c upstream. Commit 8234f6734c5d ("PM-runtime: Switch autosuspend over to using hrtimers") switched PM runtime autosuspend to use hrtimers and all related time accounting in ns, but missed to update the timer_expires data type in struct dev_pm_info to u64. This causes the timer_expires value to be truncated on 32-bit architectures when assignment i... | |||
Peter Zijlstra | 870d910e1af | serial: pl011: Fix lockdep splat when handling magic-sysrq interruptcommit 534cf755d9df99e214ddbe26b91cd4d81d2603e2 upstream. Issuing a magic-sysrq via the PL011 causes the following lockdep splat, which is easily reproducible under QEMU: | sysrq: Changing Loglevel | sysrq: Loglevel set to 9 | | ====================================================== | WARNING: possible circular locking dependency detected | 5.9.0-rc7 #1 Not tainted | -----------... | |||
Paras Sharma | 44ef3b63c78 | serial: qcom_geni_serial: To correct QUP Version detection logiccommit c9ca43d42ed8d5fd635d327a664ed1d8579eb2af upstream. For QUP IP versions 2.5 and above the oversampling rate is halved from 32 to 16. Commit ce734600545f ("tty: serial: qcom_geni_serial: Update the oversampling rate") is pushed to handle this scenario. But the existing logic is failing to classify QUP Version 3.0 into the correct group ( 2.5 and above). As result Serial Engine clocks ar... |