Commits
Stefan Roese committed a2c95a72247
PPC440 DDR setup: Set SDRAM0_CFG0[PMU]=0 for best performance AMCC suggested to set the PMU bit to 0 for best performace on the PPC440 DDR controller. Please see doc/README.440-DDR-performance for details. Patch by Stefan Roese, 28 Jul 2006