Commits
Russell Robinson committed c3eb6164e4c
board: phytec: am57xx_phycore_rdk: update EMIF1 regs Add additional EMIF1 PHY CTRL regs, and modify others, to add support for DDR3 HW write leveling sequence. Based on: commit af995fd86699a658620d42279eedc5bcea6bff78 Author: Lokesh Vutla <lokeshvutla@ti.com> Date: Wed May 6 10:52:35 2015 +0530 ARM: DRA7: DDR3: Add support for HW leveling Signed-off-by: Russell Robinson <rrobinson@phytec.com>