uboot-phytec

DTS: Fix ETH PHY reset on HSC|DDC boards (imx53)

After the commit: "eth: dm: fec: Add gpio phy reset binding"
SHA1: efd0b791069af93e9d439a70d1fe2ae8994dbbfa

The FEC ETH driver switched to PHY GPIO reset performed with data defined
in DTS.
For the HSC|DDC boards the GPIO reset signal is active low and hence the
wrong DTS description must be changed (otherwise the reset for ETH is not
properly setup).

Signed-off-by: Lukasz Majewski <lukma@denx.de>