Commits
Vineet Gupta committed 0fa400cb8a9
ARC: [plat-axs103] refactor the DT fudging code with clk frequency setting code gone by prev commits, we can elide the unconditonal DT parsing to the specific case of quad core config where we possibly need to fudge the DT value. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>