Commits
Fancy Fang committed 2a0fed9fbbb
MLK-21150-4 drm/bridge: sec-dsim: a general way to compute PLL PMS A fixed PLL PMS setting for attached panel is obviously not enough for any other mipi panel which needs a different PLL output clock frequency, and besides, for the CEA-861 standard display modes, the 'pll_pms' table also can not cover all the modes requirements. So a general way is created to solve this problem which can provide an optimum solution to output a PLL bit clock to match the request frequency in a maximum degree and also satisfy the input clock and intermediate clocks limit according to the PLL specification. Signed-off-by: Fancy Fang <chen.fang@nxp.com>