Commits
Author | Commit | Message | Commit date | Issues | |
---|---|---|---|---|---|
Matt McKee | 35d36cd54d0 | SLINTIDEV-45 arm: dts: am57xx-phycore: migrate to overlays for optional hardwareSigned-off-by: Matt McKee <mmckee@phytec.com> | SLINTIDEV-45 | ||
Matt McKee | b3fb0a1c253 | SLINTIDEV-6 arm: dts: am57xx-phycore-common: enable EEPROM write protect GPIOSigned-off-by: Matt McKee <mmckee@phytec.com> | SLINTIDEV-6 | ||
Matt McKee | 3a899efc559 | arm: dts: am57xx-phycore: add support for SOMs with AM5729, 46, and 48 SOCsSupport added for the following phyCORE-AM57x SOM configurations: PCM-057-10306111I PCM-057-11304111I PCM-057-11305111I Internal references: SLINTIDEV-52 SLINTIDEV-53 SLINTIDEV-54 Signed-off-by: Matt McKee <mmckee@phytec.com> | 4 Jira Issues | ||
James Tsai | 1ae5b38e99e | SLINTIDEV-55 arm: configs: am57xx_phycore_kit: refresh defconfig with TI's latest AM57xx EVM settingsSigned-off-by: James Tsai <jtsai@phytec.com> | SLINTIDEV-55 | ||
Matt McKee | f53b60b79b5 | SLINTIDEV-3 arm: dts: phyCORE-AM57x: update LCD2 and HDMI configurationSigned-off-by: Matt McKee <mmckee@phytec.com> | SLINTIDEV-3 | ||
Matt McKee | 1d3d371e5a9 | SLINTIDEV-3 gpu: drm: panel: panel-simple: add Prime View PM070WL4 supportSigned-off-by: Matt McKee <mmckee@phytec.com> | SLINTIDEV-3 | ||
Matt McKee | d3b0678655f | SLINTIDEV-3 arm: dts: am57xx-pcm-948-common: add regulators for phyCORE-AM57x SOM PMIC in-suppliesSigned-off-by: Matt McKee <mmckee@phytec.com> | SLINTIDEV-3 | ||
Matt McKee | 74f74836de9 | SLINTIDEV-3 arm: dts: phyCORE-AM57x: enable BB2D on AM5728 and AM5749 SOMsSigned-off-by: Matt McKee <mmckee@phytec.com> | SLINTIDEV-3 | ||
Matt McKee | 14ea3ae4784 | SLINTIDEV-3 arm: dts: am572x-pcm-948-cam: move dsp1 to timer15TI now uses timer14 in the EVE co-processor firmware which makes necessary the move of dsp1 from timer14 to timer15. Signed-off-by: Matt McKee <mmckee@phytec.com> | SLINTIDEV-3 | ||
Matt McKee | 549270b9193 | SLINTIDEV-3 arm: dts: am57xx-phytec-vm-0xx: separate endpoints for vin3aThis commit fixes an annoying warning on compiliation on all phyCORE-AM57x DTBs that include am57xx-phytec-vm-0xx.dtsi. Signed-off-by: Matt McKee <mmckee@phytec.com> | SLINTIDEV-3 | ||
Matt McKee | eed22981ddb | SLINTIDEV-3 arm: dts: phytec: reorganize memory regionsReorganized reserved and cmem memory regions so that the majority is located at the end of the first 512MiB of RAM, leaving the top 16MiB free for U-Boot. SOMs with only 512MiB of RAM will have to disable the following nodes: cmem_block_mem_0 and cmem_block_0. Signed-off-by: Matt McKee <mmckee@phytec.com> | SLINTIDEV-3 | ||
Matt McKee | b4ac4500394 | SLINTIDEV-3 arm: dts: phytec: update memory config, and model and compatible stringsMemory configuration for PCM-057 updated with correct format: <top 32 addr, bottom 32 addr, top 32 size, bottom 32 size> For 4GiB DDR boards, only 2GiB is specified in these files as the top 2GiB is not directly addressable. Configuration for the top 2GiB of 4GiB DDR SOMs is handled in U-Boot. Signed-off-by: Matt McKee <mmckee@phytec.com> | 2 Jira Issues | ||
Russell Robinson | f1de470e0c9 | arm: phytec: add support for AM5749 and refactor filesIn the process of adding support for AM5749, more granularity was required to separate the features of am571x, am572x, and am574x silicon from one another. The common files are more limited in scope, with am572x and am574x having more in common, and am571x having mostly its own files. Signed-off-by: Russell Robinson <rrobinson@phytec.com> Signed-off-by: Matt McKee <mmckee@phytec.com> | |||
khaleel | eb53c73c48f | arm: dts: phytec: update MMC config and compatible string for SOM EEPROMMMC configuration updated based on changes from v4.9 to v4.19 kernels. Also updated SOM EEPROM compatible string due to previous value being deprecated. Signed-off-by: khaleel <khaleel.s@phytec.in> Signed-off-by: Matt McKee <mmckee@phytec.com> | |||
khaleel | 4f1c2e587ed | arm: dts: phytec: utilize DRA7XX_CORE_IOPAD pinmux macrosTI added DRA7XX_CORE_IOPAD macros in a previous TISDK release, making it easier to understand the physical address location of the targeted pins. Updated PHYTEC devicetree files accordingly. For reference, this macro only requires the last four hex values of the physical address of the pad control register. Additionally, TI now defines MMC1/MMC2 pin muxing and IO delay values in dra74x-mmc-io... | |||
khaleel | 0fb3d301012 | arm: dts: am57xx-phycore-common: update RTC compatible stringSigned-off-by: khaleel <khaleel.s@phytec.in> Signed-off-by: Matt McKee <mmckee@phytec.com> | |||
khaleel | f8db0d166c1 | arm: configs: am572x_phycore_rdk: refresh defconfigThis commit refreshes the am572x_phycore_rdk_defconfig based upon the contents of tisdk_am57xx-evm_defconfig included with TI's v06.00.00.07 release. Signed-off-by: khaleel <khaleel.s@phytec.in> Signed-off-by: Matt McKee <mmckee@phytec.com> | |||
khaleel | 5be4bc9caa8 | drivers: of_mdio: revert backs the register of phy, from kernel v4.14 to v4.9all phy's with a reg property in the dtb are probed over the MDIO bus if this fails, nothing happens in kernel 4.9, but kernel 4.14 checks the return code and propagates the error causing the MDIO initialization to fail even when some phy's were found. Signed-off-by: khaleel <khaleel.s@phytec.in> | |||
khaleel | c9372a0615c | arm: boot: dts: am57xx-pcm-948-common: mux mmc1 write protect pinSigned-off-by: khaleel <khaleel.s@phytec.in> Signed-off-by: Matt McKee <mmckee@phytec.com> | |||
Russell Robinson | a1e0deb2f22 | AM57SW-210 arm: dts: phytec: create am57xx-phytec-lcd-017.dtsi and add actual support for stmpe811 tscSigned-off-by: Russell Robinson <rrobinson@phytec.com> | AM57SW-210 | ||
Matt McKee | 4ee90d527aa | AM57SW-666 arm: dts: am57xx: enable Bluetooth support for PHYTEC WiLink8 WiFi module (PCM-949)Signed-off-by: Matt McKee <mmckee@phytec.com> | 2 Jira Issues | ||
Matt McKee | 9629d4228cf | AM57SW-666 arm: configs: am572x_phycore_rdk_defconfig: enable HCI UART Bluetooth supportThis commit also enables HCILL (HCI low level) protocol support which is needed for communication with TI WiLink 8 Bluetooth chips. Signed-off-by: Matt McKee <mmckee@phytec.com> | AM57SW-666 | ||
Matt McKee | d4196df5917 | AM57SW-655 arm: dts: am572x: add support for PCM-057-00001100IThis commit contains a workaround for CPSW EMAC support when only cpsw_emac1 is connected to an ethernet PHY. Both cpsw_emac0 and cpsw_emac1 must be enabled or the CPSW driver will fail to initialize cpsw_emac1. Additionally, the 'dual_emac' property must be removed from the 'mac' node or the CPSW driver will cause a kernel panic when it attempts to initialize a NULL device. Signed-off-by: Mat... | 2 Jira Issues | ||
Matt McKee | d115c17325a | AM57SW-655 arm: dts: am57xx: offset CMA pools to support 512MiB DDR3 configurationSigned-off-by: Matt McKee <mmckee@phytec.com> | AM57SW-655 | ||
Russell Robinson | 53438ea5ca9 | AM57TLY-119 arm: configs: create phyCORE-AM57x defconfigSigned-off-by: Russell Robinson <rrobinson@phytec.com> Signed-off-by: Matt McKee <mmckee@phytec.com> | AM57TLY-119 | ||
Russell Robinson | 257f127f31a | arm: dts: Create phyCORE-AM57x DTS filesSigned-off-by: Russell Robinson <rrobinson@phytec.com> Signed-off-by: khaleel <khaleel.s@phytec.in> Signed-off-by: Matt McKee <mmckee@phytec.com> | |||
Matt McKee | b8b7ff2f05d | AM57SW-584 arm: plat-omap: dmtimer: allow timer start on probeA timer will now automatically start on probe if the following device tree entry is present in its node: ti,timer-auto-run; This is to allow timers that are used to ungate clocks to run continuously on probe. Note : ----- As per the commit id 3d3a8a2e5ecfb52383babd88157ffd6267f62b57 ti Move the dmtimer driver out of plat-omap to clocksource. So that non-omap devices also could use this. No... | AM57SW-584 | ||
Matt McKee | 579045c2d3a | AM57SW-584 media: i2c: mt9m111: allow fixed or variable pixel clk valueDriver now falls back upon Linux clock configuration subsystem if mt9m111,fixed-clock is not present in device tree node. Signed-off-by: Matt McKee <mmckee@phytec.com> | AM57SW-584 | ||
Russell Robinson | 69bd32fc2a7 | media: i2c: mt9m111: add warning when an invalid fixed-clock rate is usedSigned-off-by: Russell Robinson <rrobinson@phytec.com> | |||
Russell Robinson | 14fe3555317 | arm: dts: dra7: add label for axi@1 nodeSigned-off-by: Russell Robinson <rrobinson@phytec.com> | |||
Russell Robinson | 0962e0390fd | media: i2c: mt9m111: allow pixel rate to be set with v4l2-ctlThis allows the pixel clock to be set from userspace using the v4l2-ctl utility. Signed-off-by: Russell Robinson <rrobinson@phytec.com> | |||
Russell Robinson | 35424acf094 | media: i2c: mt9m111: add enum_frame_size supportSigned-off-by: Russell Robinson <rrobinson@phytec.com> | |||
Russell Robinson | fa0cdf07e38 | media: i2c: mt9m111: add support for VIDIOC_QUERYCAP ioctlThis is required for v4l2-ctrl support Signed-off-by: Russell Robinson <rrobinson@phytec.com> | |||
Russell Robinson | 9b8afeef6e7 | media: i2c: mt9m111: add support for additional processed bayer fmtsTo enable support for these formats use the new dts boolean "mt9m111,allow-burst" Signed-off-by: Russell Robinson <rrobinson@phytec.com> | |||
Russell Robinson | 50785cdfe60 | media: i2c: mt9m111: add 10bit color format supportBased on patch from Enrico Scholz <enrico.scholz@sigma-chemnitz.de> https://git.phytec.de/linux-mainline/patch/drivers/media/i2c?id=54c91d For reference, SOC_AS_SENSOR property is only mentioned in appnote TN09163_A and is otherwise undocumented in mt9m111 datasheets. Enable the use of these formats by using the new dts boolean "mt9m111,allow-10bit" Signed-off-by: Russell Robinson <rrobins... | |||
Russell Robinson | 67dd5c6683c | media: i2c: mt9m111: allow pixel clk inversionNew property added to enable the inversion of the sensor's pixel clock operation. This can be set using the "mt9m111,invert-pixclk" boolean in dts. Signed-off-by: Russell Robinson <rrobinson@phytec.com> | |||
Russell Robinson | 7a7f5fce230 | media: i2c: mt9m111: added IFP and BAYER support for color formatsSigned-off-by: Russell Robinson <rrobinson@phytec.com> | |||
Russell Robinson | d5d5309db03 | media: i2c: mt9m111: add s_stream support and improve on-off handlingPartially based on Enrico Scholz <enrico.scholz@sigma-chemnitz.de> patch "mt9m111: added enum_frame_size support" https://git.phytec.de/linux-mainline/patch/drivers/media/i2c?id=e66e16 That patch also implemented streaming, which has been leveraged here. Signed-off-by: Russell Robinson <rrobinson@phytec.com> Signed-off-by: khaleel <khaleel.s@phytec.in> | |||
Russell Robinson | debac7a3117 | media: i2c: mt9m111: support reset GPIOSigned-off-by: Russell Robinson <rrobinson@phytec.com> | |||
Russell Robinson | e29bbb2e1af | media: i2c: mt9m111: set fixed pixel clk valueThis allows an oscillator or fixed output clock to be used at the rate specified in dts for the entry mt9m111,fixed-clock = <27000000>; Defaults to 27 MHz if the passed value is invalid i.e. not between 27000000 and 54000000. Signed-off-by: Russell Robinson <rrobinson@phytec.com> | |||
Russell Robinson | 85aed861685 | AM57X-131 gpu: drm: omapdrm: dss: support other VOUT portsAllow dss_dpi_select_source_dra7xx to set the channel in the AM57xx DSS_CONTROL register for any VOUT port, not just VOUT1 (port 0). Signed-off-by: Russell Robinson <rrobinson@phytec.com> | AM57X-131 | ||
Russell Robinson | 58f99a42ed4 | AM57X-120 sound: davinci-mcasp: update dra7-mcasp1 entryThis change was made during a SDK kernel rebase for the other mcasp entries so apply it to the dra7-mcasp1 entry we are using to fix compile error due to the removal of the appropriate header file. Signed-off-by: Russell Robinson <rrobinson@phytec.com> | AM57X-120 | ||
Russell Robinson | 06307896fd1 | pci-dra7xx: add dts option for enabling clocksAdded support to control the output enable for the PCIe clock generator IC on the PHYTEC phyCORE-AM57xx RDK. The output enable pin is connected to a GPIO. clk_oe is obtained from the dts via the second gpios entry, and it is optional so this will not break functionality for any other boards. Signed-off-by: Russell Robinson <rrobinson@phytec.com> | |||
Russell Robinson | 05e37c3c6c2 | AM57X-63 thermal: add support for two_stage thermal governorThis governor was created to explicitly enable and disable a cooling device with only two stages as long as the temperature is still above the trip_zone. The step_wise governor's trend-based throttling resulted in frequent, abrupt off and on toggling for a two-stage device and this governor alleviates that behavior. Signed-off-by: Russell Robinson <rrobinson@phytec.com> Signed-off-by: khaleel... | AM57X-63 | ||
Russell Robinson | 4f5294efd10 | sound: davinci-mcasp: am57xx: add support for MCASP1The DMA offsets are specific to AXR14 and AXR15. Refer to the reference manual if you wish to use different AXR channels. Signed-off-by: Russell Robinson <rrobinson@phytec.com> | |||
Texas Instruments SDK Builder | a4f6916d7c6 | TISDK v06.02.00.81 Processor SDK BaseThis commit is the top-level "Create local branch" commit from the TISDK board-support/linux-4.19.79+gitAUTOINC+77dfab56c6-g77dfab56c6 directory and is only applicable for this release. -- commit 1b0b1fc93a8576ce9a3f2d55e267c709cd84595c Author: Texas Instruments SDK Builder <> Date: Sun Jan 5 02:56:13 2020 +0000 Create local branch The below commit is used for this local branch and... | |||
Muralidharan Karicheri | f0c0c3eaed5M | Merge pull request #215 in PROCESSOR-SDK/processor-sdk-linux from PLSDK-3157_ethtool_speed_change-v3 to processor-sdk-linux-4.19.y* commit 'ff7dee46abe0aa7c64e9c1814b11c3273bf89090': net: ethernet: icssg-prueth: add f/w command to set speed/duplex settings net: ethernet: icssg-prueth: preparation patch to add more f/w commands net: ethernet: icssg-prueth: fix uninitialized pkt type in descriptor | PLSDK-3157 | ||
Murali Karicheri | ff7dee46abe | net: ethernet: icssg-prueth: add f/w command to set speed/duplex settingsAdd command for changing speed or duplex settings at firmware. Currently f/w detects the setting from RGMII cfg and same scheme has some limitations in the firmware. To overcome that, Driver now call emac_change_port_speed_duplex() to create the command and send it to firmware for explicitly changing the speed/duplex setting at firmware. The firmware requires that only one command to be sent to... | |||
Murali Karicheri | fbead6b63be | net: ethernet: icssg-prueth: preparation patch to add more f/w commandsMove out command creation code to a separate function to prepare for additional command support in the driver. while at it also adjust the text in the log to indicate the command type sent to firmware to help in debug. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> | |||
Murali Karicheri | f5e8b776722 | net: ethernet: icssg-prueth: fix uninitialized pkt type in descriptorCurrently driver doesn't set the packet type explicitly to zero in the first_desc. This causes issues at firmware since packet type is used to differentiate between command and data. This patch fixes it by initializing packet type to zero. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> |